Synopsys Accelerates RTL Signoff with Introduction of New SpyGlass Lint Advanced Solution

Breakthrough Lint-Turbo Technology Delivers 10X Performance, 5X Improvement in Memory, and 3X Faster Design Closure

MOUNTAIN VIEW, Calif., March 29, 2016 — (PRNewswire) —  Synopsys, Inc. (NASDAQ: SNPS), today announced the availability of its SpyGlass® Lint Advanced product, leveraging Lint-Turbo Technology to enable 10X faster performance, 5X improvement in memory footprint and 3X faster design closure, for accelerated RTL signoff. SpyGlass Lint Advanced builds upon the industry-leading SpyGlass family of products, to deliver a static verification methodology that minimizes costly design iterations for large-scale, complex System-on-Chip (SoC) designs. Synopsys' Lint Advanced solution uses advanced structural techniques, a new hierarchical engine and deeper functional analysis, to enable SoC teams to find bugs much earlier in the design flow, saving valuable design cycles and accelerating RTL signoff.

"Our advanced Fit Fast Structured Arrays (FFSA™) products delivers best-in-class solutions to enable lower cost and faster time to market for the ASIC and FPGA markets," said Soheila Lighvani, design engineering director at Toshiba America Electronic Components, Inc. "To deliver these industry-leading products, we require an RTL solution that enables us to quickly locate design bugs. With SpyGlass Lint Advanced, we are able to locate these bugs significantly earlier in the design flow, enabling our SoC teams to efficiently accelerate RTL signoff and time to market."

With the growth in size and complexity of today's SoC designs, reuse of design IP and RTL errors results in unpredictability in the design process, long verification cycles and functional failures. SoC teams not only face increased risk during the chip verification process, but also must increase productivity in order to verify these complex chip designs. Successfully addressing these challenges requires an RTL signoff process that reduces iterations, design effort and schedule risk. With improved root-cause analysis for easier debug, hierarchical lint flow to enable parallelization of SoC and IP blocks for significant time reduction, and deeper formal verification to mitigate functional errors and produce conclusive results, SpyGlass Lint Advanced offers a significantly enhanced RTL signoff process.

"We continue to collaborate with leading-edge SoC teams on our SpyGlass family of products, to enable increased efficiency and ease of use," said Mo Mohaved, vice president of R&D for Synopsys' Verification Group. "With the addition of SpyGlass Lint Advanced, SoC teams are now able to increase overall productivity and address the challenges of RTL with a smarter, faster and more comprehensive RTL signoff solution."

Synopsys hosted a webinar to introduce the new SpyGlass Lint Advanced solution. A replay of the webinar can be accessed here.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 16th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.

Editorial Contacts:
Sheryl Gulizia
Synopsys, Inc.
650-584-8635
Email Contact

To view the original version on PR Newswire, visit: http://www.prnewswire.com/news-releases/synopsys-accelerates-rtl-signoff-with-introduction-of-new-spyglass-lint-advanced-solution-300242347.html

SOURCE Synopsys, Inc.

Contact:
Synopsys, Inc.
Web: http://www.synopsys.com

Featured Video
Jobs
Principal Engineer for Autodesk at San Francisco, California
Machine Learning Engineer 3D Geometry/ Multi-Modal for Autodesk at San Francisco, California
Senior Principal Software Engineer for Autodesk at San Francisco, California
Business Development Manager for Berntsen International, Inc. at Madison, Wisconsin
Mechanical Engineer 2 for Lam Research at Fremont, California
Equipment Engineer, Raxium for Google at Fremont, California
Upcoming Events
Digital Twins 2024 at the Gaylord National Resort & Convention Center in, MD. National Harbor MD - Dec 9 - 11, 2024
Commercial UAV Expo 2025 at RAI Amsterdam Amsterdam Netherlands - Apr 8 - 11, 2025
Commercial UAV Expo 2025 at Amsterdam Netherlands - Apr 8 - 10, 2025
BI2025 - 13th Annual Building Innovation Conference at Ritz-Carlton Tysons Corner McLean VA - May 19 - 21, 2025



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise