Mirabilis Design System-Level AI Modeler reduces latency and power by 2-6X
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Mirabilis Design System-Level AI Modeler reduces latency and power by 2-6X

System-Level Intellectual Property and Simulation Environment for AI Processors

Santa Clara, CA. — November 26, 2021 — Mirabilis Design Inc, the leading provider of system-level Intellectual Property and Simulation Solutions for electronics and processors, announced today the release of VisualSim AI Processor Designer. VisualSim AI accelerates time-to-market of new AI technology, configures high-performance computing systems, eliminates under and over-design, and provides an interactive reference design for end-users to create new applications. 

VisualSim can be used for the architecture evaluation of AI processor hardware, partition AI algorithms on a System-on-Chip (SoC), test the AI/ML implementation, and measure power and performance of an AI processor in an automotive, medical, and data center applications. The Intellectual Property available in the VisualSim AI brings together processor cores, neural networks, accelerators, GPU and DSP. At the system-level, VisualSim AI can be integrated with a network model and FPGA boards for full system verification.

“The best processor configuration depends on the application, price point and the expected performance.  Trying to predict the feasibility before building the first prototype requires modeling IP, which is never readily available.  The intense competition in the marketplace makes the delay in detecting performance limitation, a major detriment to a successful new product introduction”, says Deepak Shankar, Vice President – Technology, Mirabilis Design Inc. “The complex model requires configurable IPs and an integrated simulation environment.”

The AI Designer enables an architect to rapidly construct a graphical model using parameterized IP and integrating around an interconnect such as a Network-on-Chip, Quantum Nodes or in-Memory elements.  The user can accurately simulate AI workloads and real-life interface traffic. The model can vary task allocation between cores, neural networks and accelerators; size the system parameters; create an equilibrium between response time and power consumption; and select the scheduler and buffer strategy.  The combination of the large model capacity, fast model construction, an extremely fast simulator, and a programmable analytics engine, enables users to rapidly arrive at the most suitable architecture.  

Users can run software on the VisualSim AI architecture to measure response times, power, network throughput, cache hit-ratio, and memory bandwidth. VisualSim AI enables companies to optimize and validate the SoC system specification, and system companies to select the right SoC for the target application. A number of beta customers have utilized this platform to design AI SoC for the data center and automotive applications. Other applications that can use this platform are autonomous driving, radars’ processing, defense systems, flight avionics, medical instruments, high performance computing and infotainment systems. v
 
Availability

VisualSim AI designers have tested the accuracy of the IP blocks for the task latency and power consumption across multiple projects.  The platform works on VisualSim version 2140b.  OS supported includes Windows, Linux and Mac OS.  To learn more, register for a private session in Booth 2441 at Design Automation Conference 2021 in San Francisco by registering at https://calendly.com/mirabilisdesign/dac or contact Mirabilis Design at Email Contact
 
 
About Mirabilis Design

Mirabilis Design is a Silicon Valley software company, providing software solutions to identify and eliminate risk in the product specification, accurately predicting the human and time resources required to develop the product, and improve communication between diverse engineering teams. VisualSim Architect combines Intellectual Property, system-level modeling, simulation, environment analysis and application templates to significantly improve model construction, simulation, analysis and RTL verification. The environment enables designers to rapidly converge to a design which meets a diverse set of interdependent time and power requirements. It is optimally used very early in the design process in parallel with (and as an aid to) the development of the product’s written specification and long before an implementation (for example, RTL, software code, or schematic) of that product can even be started.  
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Trademarks
Mirabilis Design, VisualSim and Mirabilis Design logo are trademarks of Mirabilis Design Inc.
 
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