Toshiba Launches World's Smallest-class Embedded NAND Flash Memory Products

*In Toshiba e∙MMCTM categories, “Supreme” represents products suited to high-end class applications and “Premium” represents products for middle- and low-end class applications.

Key Features

  1. The JEDEC e∙MMCTM compliant interface handles essential functions, including writing block management, error correction and driver software. It simplifies system development, allowing manufacturers to minimize development costs and speed up time to market for new and upgraded products. Additionally, new features[5] among them BKOPS control, Cache Barrier, Cache Flushing Report, and Large RPMB Write, are applied to the new products to enhance usability.
  2. The 8GB to 64GB products are sealed in a small FBGA package measuring just 11mm x 10mm and are suitable for smartphones, tablet PCs and wearable devices where miniaturization and weight savings are requirements.
  3. Embedded in a system, the 128GB products can record up to 16.3 hours of full spec high definition video and 39.7 hours of standard definition video[6].
 

Key Specifications

Interface   JEDEC e∙MMCTM V5.0 standard

HS-MMC interface

Capacity 8GB, 16GB, 32GB, 64GB, 128GB
Power Supply

2.7-3.6V      

 

(Memory core)

Voltage

1.7V-1.95V, 2.7V-3.6V

 

(Interface)

Bus Width x1, x4, x8

Temperature
Range

-25oC to +85oC
Package   153Ball FBGA

11.5mm x 13.0mm, 11.0mm x 10.0mm

 

Notes

[1]   As of October 2, 2014. Toshiba survey. Excluding the 128GB product.
[2] e•MMC TM is a product category for a class of embedded memory products built to the JEDEC e•MMC TM Standard specification and is a trademark of the JEDEC Solid State Technology Association.
[3] Excluding the 128GB product.
[4] High-speed class e•MMC TM embedded NAND flash memory products using 19nm second generation process technology.
[5]

“BKOPS control” is a function where the host allows the device to perform background operation during the device’s idle time. “Cache Barrier” is a function that controls when cache data is written to the memory chip. “Cache Flushing Report” is a function that informs the host if the device’s flushing policy is FIFO or not. “Large RPMB write” is a function that enhances the data size that can be written to the RPMB area to 8kB.

[6] HD and SD are calculated at average bit rates of 17Mbps and 7Mbps, respectively.

Featured Video
Jobs
Principal Engineer for Autodesk at San Francisco, California
Senior Principal Software Engineer for Autodesk at San Francisco, California
Machine Learning Engineer 3D Geometry/ Multi-Modal for Autodesk at San Francisco, California
Mechanical Test Engineer, Platforms Infrastructure for Google at Mountain View, California
Manufacturing Test Engineer for Google at Prague, Czechia, Czech Republic
Equipment Engineer, Raxium for Google at Fremont, California
Upcoming Events
World Architecture Festival 2024 at Marina Bay Sands Singapore - Nov 6 - 8, 2024
Dimensions User Conference 2024 at The Venetian Resort Las Vegas NV - Nov 11 - 13, 2024
Greenbuild 2024 at Pennsylvania Convention Center Philadelphia PA - Nov 12 - 15, 2024
Digital Construction North (DCN) 2024 at Manchester Central. Manchester United Kingdom - Nov 13, 2024



© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise