MONROVIA, California – March 9, 2011 – At DATE 2011, Tanner EDA, the catalyst for innovation for the design, layout and verification of analog and mixed-signal integrated circuits (ICs), will continue their focus on accelerating analog design with demonstrations and presentations. The company will demonstrate the latest version of their full-flow analog design suite, HiPer Silicon, in Booth #35 as well as presenting on process design kits (PDKs) for analog designers in the TowerJazz booth. DATE 2011 (Design, Automation and Test in Europe) takes place from 14 to 18 March in the Alpexpo Espace Alpes Congres, Grenoble, France.

PRESENTATIONS:

What:  As part of the TowerJazz focus on design enablement platforms, Tanner EDA will present on some of the key challenges facing analog designers related to PDKs. On January 19, 2011, Tanner EDA and TowerJazz announced a qualified PDK and reference flow for TowerJazz’s 0.18um Power Management process. This presentation will demonstrate the PDK functionality, including symbol libraries for Tanner EDA’s S-Edit schematic capture software as well as parameterized layout generators for its widely installed layout editor, L-Edit.

Who:  John Zuk, Vice President of Marketing and Strategy, Tanner EDA

When:  Tuesday, March 15^th at 3:00 pm and Wednesday, March 16^th  at 4:00 pm      

Where: TowerJazz Booth # 13

DEMONSTRATIONS:

What: Introducing version 15.11 of the company’s HiPer Silicon full-flow design suite, which gives designers a complete analog design flow from schematic capture, circuit simulation, and waveform probing to physical layout and verification. HiPer Silicon v15.11 contains new features and functionality, including:

• S-Edit Additions
• T-Spice Performance Improvements
• W-Edit Enhancements
• L-Edit Productivity Gains
• HiPer DevGen Additions
• HiPer Verify Enhancements

When:  Tuesday, March 15^th through Thursday, March 17^th, 2011

Where: Tanner EDA Booth #35

About Tanner EDA

Tanner EDA provides a complete line of software solutions that catalyze innovation for the design, layout and verification of analog and mixed-signal (A/MS) integrated circuits (ICs) and MEMS. Customers are creating breakthrough applications in areas such as power management, displays and imaging, automotive, consumer electronics, life sciences, and RF devices. A low learning curve, high interoperability, and a powerful user interface improve design team productivity and enable a low total cost of ownership (TCO). Capability and performance are matched by low support requirements and high support capability as well as an ecosystem of partners that bring advanced capabilities to A/MS designs.

Founded in 1988, Tanner EDA solutions deliver just the right mixture of features, functionality and usability. The company has shipped over 33,000 licenses of its software to more than 5,000 customers in 67 countries.

HiPer Verify and HiPer Silicon are trademarks of Tanner Research, Inc.

All other trademarks and trade names are the property of their respective owners.

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Media Contacts:

Linda Marchant, Cayenne Communication, 919-451-0776, Email Contact