Display and analysis of Cortex-M3 processor SWV/SWO data is greatly simplified. For example, a statistical function profiler based on the Cortex-M3 processor PC sampler makes it easy to find hot spots and CPU intensive functions in an application, and a disassembly window, featuring an instruction trace count, gives simplified code coverage functionality. A new Data Log window logs accesses to up to four different memory locations or areas, and includes time information. In addition, an Interrupt Log window now logs entrances and exits to and from interrupts, including time information. A time scale for each interrupt source is displayed in a Graph window.
The compiler optimizer has been tuned to generate industry-leading code size for Cortex-M3 code. The linker can also now compress initialized data to minimize demands on Flash memory: the compressed data will be automatically uncompressed when moved from Flash to RAM by the startup code.
Over 1400 example projects are now included in the product installation. These cover evaluation boards from Actel, Analog Devices, Aiji Systems, Atmel, Cirrus Logic, Freescale, LogicPD, Luminary, Micronas, Nohau, OKI, Olimex, Pasat, NXP, Phytec, STMicroelectronics, Texas Instruments, Toshiba, and IAR Systems.
“The IAR Embedded Workbench has made a significant contribution to the success of the Cortex-M3 processor and now the debugger supports the features of the CoreSight technology,” said Reinhard Keil, Director of MCU Tools, ARM. “IAR Systems’ support for the CMSIS initiative is important for its success and I am excited to see that CMSIS layer is included in the new release. This is a major step towards standardization in the software industry since it enables sharing of software components.”
The latest evaluation version of IAR Embedded Workbench for ARM Cortex-M3 processor can be downloaded at www.iar.com/downloads
Editor’s Notes
IAR Systems is a founding member and supporter of the Cortex Microcontroller Software Interface Standard (CMSIS) which enables consistent software interfaces for silicon, tool and middleware providers across all Cortex-M series processors, simplifying software re-use across new devices and reducing time to market for new devices.
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