"As a consumer electronics industry leader, Ricoh is focused on getting innovative products to market first," said Kazunobu Sugaya, manager, Design Engineering Section, Imaging System LSI Development Center, Electronic Devices Company, Ricoh. "Using the Cadence Encounter® digital IC design flow, we are able to gain greater productivity and faster time to market for digital IC design. This is critical as we drive next-generation, large-scale complex chips targeted for advanced process technologies."
After the digital IC evaluation, a new design flow was developed based on the holistic Cadence Encounter RTL to GDSII system. This logic design and physical implementation flow includes Encounter RTL Compiler synthesis, Conformal Equivalence Checker, First Encounter Silicon Virtual Prototyping and SOC Encounter. A key driver in the decision to standardize on the Cadence Encounter Platform was the significant improvement in efficiency and cycle time enabled by a front-to-back holistic solution that bridges the gap between front-end designers and back-end designers. The streamlined design flow enabled reduced iterations through large-scale, top-down RTL-synthesis based on direct physical interconnect timing and through improved management of complex multi-mode, multi-corner timing constraints.
Ricoh is now starting to evaluate the Si2 Common Power Format (CPF)-based Cadence Low-Power Solution, which they expect would support the Ricoh 'Eco Management' initiative to reduce power consumption in electronic devices.
"Ricoh's decision to upgrade their longstanding digital implementation solution with the Cadence Encounter Platform is a strong endorsement of our recent aggressive technology advancements and our ability to provide differentiated solutions for low-power and advanced node designs," said Chi-Ping Hsu, corporate vice president, IC Digital and Power Forward. "We are confident with our focused advanced technology developments to continue the Cadence leadership in advanced node and low power designs."
About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. Cadence reported 2007 revenues of approximately $1.6 billion, and has approximately 5,100 employees. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
Cadence and Encounter are registered trademarks and the Cadence logo is a trademark of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.
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For more information, please contact: Dan Holden Cadence Design Systems, Inc. 408-944-7457 Email Contact
