Chip makers continue to seek new ways to optimize performance per watt per dollar, especially as the cost advantages of silicon process scaling dwindle. Many OEMs and chip architects view chiplets, an approach that replaces system-on-chip (SoC) designs with multi-die heterogeneous integrated implementations, as a breakthrough for optimizing their designs and business processes. As a result, the Yole Group estimates that the chiplet-based Systems-in-Package (SIPs) market will exceed $135 billion by 2027.
"Chiplets are extremely effective for reducing production as well as design costs via improved yields and implementing functions in the process technology most suited to them," said Sandeep Badida, CEO at Apex Semiconductor, a provider of high-performance application-specific integrated circuits (ASIC) design services. "However, realizing the potential benefits of chiplet-based design requires a versatile interconnect solution like Blue Cheetah's that can support multiple process nodes, minimize die-to-die latency, power, and area, and accommodate a wide variety of packaging and product needs."
"BlueLynx is the industry's leading standards-based and silicon-proven solution for chiplet die-to-die interconnect IP," said Elad Alon, CEO at Blue Cheetah. "Our test chip and the tape-outs on various process nodes with our customers demonstrate that our customizable, expertly optimized die-to-die interconnect makes chiplets a viable option for any companies pursuing that approach today."
BlueLynx D2D interconnect subsystem IP consists of a PHY and link layer supporting Open Domain-Specific Architecture (ODSA) Bunch of Wires (BoW) and is configurable to support Universal Chiplet Interconnect Express (UCIe).
BlueLynx D2D interconnect features:
- 5nm, 7nm, 12nm, 16nm process technologies
- 16Gb/s/wire high bandwidth with support down to 2Gb/s/wire for energy efficiency
- <2ns end-to-end latency
- <0.15 mm2 per 16-bit data slice
- <0.5pJ/bit, <1e-20 error rate
- 45um to 130um bump pitch
- Up to 25mm trace lengths, compatible with organic substrates or advanced packages
- Fully compliant with ODSA Transaction and Link Layer supporting AXI5 Lite (A5L), CHI rev D, virtual wires, and ECC
About Blue Cheetah Analog Design
Blue Cheetah provides rapidly customized, highly optimized die-to-die (D2D) interconnect solutions for chiplets. Its state-of-the-art semiconductor IP solutions are process-adaptable and customizable to achieve industry-leading PPA (power-performance-area) for high-performance computing, AI/ML, networking, mobile, and many other applications. The company's BlueLynx platform provides chip makers the fastest, lowest-risk path to application-optimized chiplet interconnect solutions. Blue Cheetah was founded in 2018 and is headquartered in Sunnyvale, California. Visit
https://www.bcanalog.com/.
Media Contact:
Blue Cheetah Analog Design
Pauline Shulman
415-375-0303
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