Synopsys Delivers Silicon-Proven HBM2E PHY IP Operating at 3.2 Gbps

DesignWare HBM2E PHY IP in TSMC's N7 Process Delivers High Throughput for Advanced Graphics, High-Performance Computing and Networking SoCs

MOUNTAIN VIEW, Calif., Feb. 25, 2020 — (PRNewswire) —

Highlights:

  • Synopsys' DesignWare HBM2E IP in TSMC's N7 process provides up to 409 GBps aggregate memory bandwidth with low-power consumption and latency
  • The HBM2E PHY has been verified using TSMC's CoWoS® technology integrating the test chip with the IP and HBM2E SDRAMs using 2.5D packaging
  • Synopsys' silicon-proven HBM2/2E IP solution with hardening expertise enables designers to meet unique, high-performance application requirements

Synopsys, Inc. (Nasdaq: SNPS) today announced it has delivered silicon-proven HBM2E PHY IP operating at 3.2 gigabits per second (Gbps), addressing high throughput requirements of advanced graphics, high-performance computing and networking SoCs. Verified on TSMC's Chip-on-Wafer-on-Substrate (CoWoS®) advanced packaging technology, Synopsys' DesignWare® HBM2E PHY IP offers a micro-bump array that adheres to the JEDEC HBM2E SDRAM standard for the shortest possible 2.5D package routes and highest signal integrity.

With an aggregated bandwidth of 409 gigabytes per second, the HBM2E PHY delivers the required massive compute performance of system-on-chips (SoCs) in advanced FinFET processes. The HBM2E IP is part of Synopsys' comprehensive memory interface IP solution that includes DDR5/4/3/2 and LPDDR5/4/3/2 IP, which have been validated in hundreds of designs and shipped in millions of SoCs.

"As a leading global semiconductor manufacturer, SK hynix makes significant investments in developing robust DRAMs that offer increased capacity and processing speed while maintaining strict quality control," said Jun Hyun Chun, senior vice president, HBM Product Champion and Head of DRAM Design at SK hynix. "We continue to collaborate with Synopsys to provide customers with a high-performance HBM DRAM solution that is fully-tested and interoperable with Synopsys' DesignWare HBM2E IP, which delivers the required capacity, throughput and power of compute-intensive SoCs in advanced processes." 

"TSMC's long history of successful collaboration with Synopsys has provided our mutual customers with access to a broad portfolio of high-quality DesignWare IP on TSMC's advanced process technologies, which they can integrate into their high-performance SoCs for a wide range of applications," said Suk Lee, senior director of the Design Infrastructure Management Division at TSMC. "TSMC's industry-leading N7 process and CoWoS® packaging technologies combined with Synopsys' silicon-proven DesignWare HBM2E IP allows designers to achieve faster silicon-to-package manufacturing with improved yield, while minimizing integration risk."

"High-performance computing SoCs are requiring significantly more memory bandwidth to manage the massive amounts of data transfer to support rich graphics and machine learning workloads," said John Koeter, senior vice president of marketing and strategy for IP at Synopsys. "As the leading memory interface IP provider, Synopsys delivers a range of silicon-proven DesignWare Memory Interface IP solutions with leading power, performance, and area to address the most challenging throughput requirements."   

Availability & Resources

The Synopsys DesignWare HBM2/2E IP is available now.
For more information, visit the DesignWare HBM IP web page.

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors, and subsystems. To accelerate prototyping, software development, and integration of IP into SoCs, Synopsys' IP Accelerated initiative offers IP prototyping kits, IP software development kits, and IP subsystems. Synopsys' extensive investment in IP quality, comprehensive technical support, and robust IP development methodology enable designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit http://www.synopsys.com/designware.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.

Editorial Contact:
Kelly James
Synopsys, Inc.
650-584-8972
kellyj@synopsys.com 

 

Cision View original content: http://www.prnewswire.com/news-releases/synopsys-delivers-silicon-proven-hbm2e-phy-ip-operating-at-3-2-gbps-301010554.html

SOURCE Synopsys, Inc.

Contact:
Company Name: Synopsys, Inc.
Web: http://www.synopsys.com
Financial data for Synopsys, Inc.

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