Campbell, Calif. and Oxford, England, May 30, 2019 (GLOBE NEWSWIRE) --
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Wave Computing® Inc., the Silicon Valley company accelerating artificial intelligence (AI) from the data center to the edge, and Imperas Software Ltd. , the leader in virtual platforms and software simulation, introduced a new Instruction Set Simulator (ISS) for the MIPS Open™ community of SoC designers and processor architects, called MIPSOpenOVPsim™. MIPSOpenOVPsim will be made available for download through the MIPS Open program on June 3, 2019 at https://www.mipsopen.com.
“The Imperas simulation and modeling technology has been a reliable and high-quality testing model used internally by the MIPS engineering team for many years,“ said Krishna Raghavan, president of Wave Computing’s MIPS IP Licensing business. “We’re delighted to partner with Imperas to make this industrial-grade simulation technology available to support the MIPS Open program and further the momentum around open hardware development.”
MIPSOpenOVPsim is a MIPS system architecture simulator, available at no cost, which implements a complete single-core CPU. This downloadable tool delivers industry standard simulations to test commercial SoC design performance and quality. MIPSOpenOVPsim offers:
- A jump-start to software and firmware development during the SoC design cycle
- Early-stage implementation testing and Design Verification (DV) of MIPS CPU core designs
- Acceleration of compliance testing by providing a reference environment
MIPSOpenOVPsim helps SoC developers by providing a comprehensive testing platform for all MIPS Open specifications and extensions including:
- The MIPS 32 and 64-bit Instruction Set Architecture (ISA) Release 6 licensed under MIPS Open
- MIPS SIMD Extensions v. 1.0
- MIPS DSP Extensions
- MIPS Multi-Threading (MT)
- MIPS MCU
- microMIPS Architecture
- MIPS Virtualization (VZ)
MIPSOpenOVPsim is an entry ramp for software development, SoC testing and verification. For developers of more advanced designs who need multi-core support and advanced debug tools, Imperas also offers full-capability virtual platforms. MIPSOpenOVPsim includes a freedom to use license model from Imperas, which supports commercial as well as academic use. Further details are available at http://www.imperas.com.
Highlights of MIPSOpenOVPsim include:
- Model : A configurable MIPS R6 Fast Processor Model as a full, single core implementation of the full 32 and 64-bit MIPS instruction set specifications. This complete, flexible model covers all envelope configurations and the instruction-accurate model can be configured to any single core configuration. It is also suitable as a platform target to develop bare metal applications and also models the MIPS32 microAptiv cores recently made available within the MIPS Open Program.
- Simulator: MIPSOpenOVPsim includes an instruction-accurate MIPS CPU simulator, based on the world-class Imperas Open Virtual Platform (OVP) simulator technology. MIPSOpenOVPsim delivers exceptionally fast, high-performance simulations, running over 500 million instructions per second on a standard host PC (Windows or Linux). The platform also includes runtime configurable settings for all MIPS Open specifications, making it very easy to compare runtime results with RTL implementations.
- Free and easy to adopt: MIPSOpenOVPsim will be released on June 3, 2019 via the Wave Computing MIPS Open program at https://www.mipsopen.com.
“Having partnered with the Wave Computing MIPS engineering team and IP customers over the past decade, our model and simulation technology has enabled MIPS-based devices to be deployed across a broad range of embedded markets,” said Simon Davidmann, president and CEO, Imperas. “This no-cost instruction set simulator is an ideal start for developers looking to explore the potential of various SoC designs through Wave Computing’s MIPS Open program.”
Imperas will demonstrate the MIPSOpenOVPsim, as well as other MIPS-based virtual platforms and tools, at the Design Automation Conference (DAC) taking place June 2-6, 2019 at the Las Vegas Convention Center in Booth #1030. Further details are at
https://www.dac.com.
Wave Computing will highlight MIPSOpenOVPsim at the MIPS Open Developer Day on June 2, 2019 at the Embassy Suites by Hilton Convention Center Las Vegas, 3600 Paradise Road, Las Vegas, NV, 89169. Interested developers can register for this free event at:
https://www.eventbrite.com/e/mips-open-developer-day-registration-61820528866
About Imperas
Imperas is revolutionizing the development of embedded software and systems and is the leading independent provider of processor models and virtual prototype solutions. Imperas, along with Open Virtual Platforms (OVP), promotes fast simulation models for a spectrum of processors, IP vendors, CPU architectures, system IP and reference platform models of processors and systems ranging from simple single core bare metal platforms to full heterogeneous multi-core systems booting SMP Linux. All models are available from Imperas at www.imperas.com and the Open Virtual Platforms (OVP) website. For more information about Imperas, please see www.imperas.com. Follow Imperas on LinkedIn, twitter @ImperasSoftware and YouTube. All Imperas trademarks or registered trademarks are the property of Imperas Software Limited or their respective holders.
About Wave Computing
Wave Computing, Inc. is revolutionizing artificial intelligence (AI) with its dataflow-based systems and solutions. The company’s vision is to bring deep learning to customers’ data wherever it may be—from the datacenter to the edge—helping accelerate time-to-insight. Wave Computing is powering the next generation of AI by combining its dataflow architecture with its MIPS embedded RISC multithreaded CPU cores and IP. Wave Computing received Frost & Sullivan’s 2018 “Machine Learning Industry Technology Innovation Leader” award and recognized as one of the “Top 25 Artificial Intelligence Providers” by CIO Applications magazine. More information about Wave Computing can be found at
https://wavecomp.ai.
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Wave Computing, the Wave Computing logo, MIPS Open, MIPS32, microAptiv, TritonAI 64 and MIPS are trademarks of Wave Computing, Inc. and its applicable affiliates. All other trademarks are used for identification purposes only and are the property of their respective owners.
Siobhan Lyons Wave Computing 2024319411 slyons@wavecomp.com
