Highlights:

• New embARC Machine Learning Inference (MLI) software library is optimized for low-power IoT applications that utilize convolutional neural networks (CNN) and recurrent neural networks (RNN)
• The library supports the energy-efficient Synopsys DesignWare ARC EM DSP and HS DSP Processors
• Boosts performance up to 16X for 2D convolution layers compared to unoptimized implementations
• The library accelerates RNNs up to 5X for a wide range of topologies, including those built with long short-term memory (LSTM) cells
• The MLI software library is distributed as free and open-source software through the embARC.org website

Synopsys, Inc. (Nasdaq: SNPS) today announced availability of the new embARC Machine Learning Inference software library to facilitate development of power-efficient neural network system-on-chip (SoC) designs incorporating Synopsys' DesignWare^® ARC^® EM and HS DSP Processor IP. The embARC Machine Learning Inference (MLI) software library provides developers with optimized functions to implement neural network layer types, significantly reducing processor cycle counts for applications that require low power and area, such as voice detection, speech recognition, and sensor data processing. The embARC MLI software library is available through embARC.org, a dedicated website that provides software developers centralized access to free and open source software, drivers, operating systems, and middleware supporting ARC processors.

"To provide our customers with an ultra-low power AI solution for voice triggering and recognition, we need power- and area-efficient processor IP like ARC EM DSP processors," said Albert Liu, founder and chief executive officer at Kneron. "By offering the embARC Machine Learning Inference software library, Synopsys gives SoC developers the fundamental kernels needed to quickly implement machine learning algorithms on ARC-based designs."

The embARC MLI software library supports ARC EMxD and HS4xD processors and provides a set of essential kernels for effective inference of small- or mid-sized machine learning models. It enables the efficient implementation of operations such as convolutions, long short-term memory (LSTM) cells, pooling, activation functions such as rectified linear units (ReLU), and data routing operations, including padding, transposing, and concatenation, while reducing power and memory footprint. As an example, low-power neural network benchmarks such as CIFAR-10 running on an ARC EM9D processor can achieve up to a 4X reduction in cycle count compared to competitive processors in the same class. Additionally, the MLI library provides an average of 3-5X performance improvement across a wide range of neural network layers, such as depth-wise 2D convolution, fully connected, basic RNN cells, and LSTM cells with a maximum performance boost of up to 16X for 2D convolution layers.

"Power consumption and area are critical considerations for embedded machine learning functionality in edge devices," said John Koeter, vice president of marketing for IP at Synopsys. "By enabling broad classes of neural networks to run on power-efficient ARC EM and HS DSP processors, Synopsys is expanding the set of ARC processors that developers can choose to create their energy-efficient AI designs."

Availability and Resources

• The embARC Machine Learning Inference software library is available now from www.embarc.org.

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors, and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys' IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit https://www.synopsys.com/designware.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software^™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15^th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.

Editorial Contacts:
Teresa Zhang
Synopsys, Inc.
yingxue@synopsys.com

Norma Sengstock 
Synopsys, Inc.
norma@synopsys.com

SOURCE Synopsys, Inc.