New capabilities in PLLs, SerDes, and Oscillator IP at leading nodes

SUWANEE, Ga. — (BUSINESS WIRE) — April 25, 2018 — Silicon Creations, a leading supplier of high-performance analog and mixed-signal intellectual property (IP), will showcase a number of technology advances in its industry-leading IP portfolios on TSMC process technologies. The developments, outlined at TSMC’s North American Technology Symposium being held May 1, 2018, are the latest in a long and successful collaboration between the world’s leading foundry and Silicon Creations that stretches back nearly a decade.

Highlighting Silicon Creations’ presence at the prestigious event are:

• Silicon Creations’ PLL IP availability on TSMC 7nm FF/FF+ process
• Full range of ring PLLs available now in TSMC 22nm ULP/ULL process
• Multiprotocol 12.7Gbps SerDes PMA ported to TSMC 40nm LP process
• Free-running oscillator silicon IP in TSMC 7nm FF process
• ISO 26262-compliant safety documentation packages to ASIL-B and ASIL-C for Fractional-N PLL in TSMC 16nm FFC

“We’re proud of the leading-edge solutions we’ve delivered to customers, thanks in part to our valuable, enduring partnership with TSMC,” said Andrew Cole, vice president, Silicon Creations. “We support companies around the world to leverage the latest in manufacturing process technology to achieve more performance with lower risk.”

Silicon Creations’ range of PLLs that have been silicon proven in 7nm FinFET (FF) were ported from PLLs in large volume production in 16nm FFC. These PLLs include:

• General purpose Fractional-N PLL, with power as low as 1.5mW yet also able to provide a reference clock for PCIe3
• IoT PLL multiplying a 32kHz RTC to audio codec and digital core frequencies
• Tiny core voltage-only PLLs for digital clocking
• Self-calibrating Deskew PLL used in DDR PHYs

Several of these PLLs have been re-verified in the 22nm process and are available for tapeout immediately. Silicon Creations’ recent activity in SerDes and additional analog IP include:

• The company’s 16nm FFC mass production free-running oscillator used as a watchdog timer and core clock has been ported to 7nm.
• The Multiprotocol SerDes PMA designed for the award-winning Microsemi PolarFire FPGA to TSMC 40 LP supporting the same continuous speed range from 0.5Gbps to 12.7Gbps. This PMA supports well over 30 protocols and has a fast burst mode CDR. This TSMC 40 LP PMA IP has now been tested over PVT and shows even better jitter and equalization performance than the FPGA. The same IP is available now for design starts in TSMC 12nm FFC /16nm FFC where it will support up to PCIe4 (16Gbps).

As a TSMC IP Alliance member, Silicon Creations’ extensive portfolio of PLL and high-speed I/O IPs has been qualified through the TSMC IP9000 program for a number of processes ranging from 180nm to 7nm. These IPs will be showcased at the upcoming TSMC Technology Symposium on May 1, 2018 held at the Santa Clara Convention Center in Santa Clara, Calif. Visit Silicon Creations’ booth #604 for more information and demos.

About Silicon Creations

Silicon Creations provides world-class silicon intellectual property (IP) for precision and general-purpose timing (PLLs), chip-to-chip SerDes and high-speed differential I/Os. Silicon Creations’ IP is proven from 7nm to 180nm process technologies. With commitment to customer success, its IP has an excellent record of first silicon to mass production in customer designs. Silicon Creations, founded in 2006, is self-funded and growing. The company has development centers in Atlanta, Ga., and Krakow, Poland, and worldwide sales representation. For more information, visit www.siliconcr.com.

All reference to Silicon Creations trademarks are the property of Silicon Creations, Inc. All other trademarks mentioned herein are the property of their respective owners.

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