"Catapult has enabled SeeCubic to develop our real-time conversion IP block without upfront choice of a targeted IC technology," said Hans Zuidema, CTO of Stream TV Networks. "We have validated the IP design in an FPGA, and retargeting to a new partner's technology is easily facilitated by Catapult HLS. We are now ready to start deep IC integration with strategic partners for use in mobile devices and display-SoCs."
This newly developed IP block implements patented, proprietary Ultra-D depth-estimation algorithms. The Catapult HLS C/C++ to register-transfer level (RTL) flow gives designers the ability to make algorithmic changes in late stages of IP development and to mutually optimize the algorithm and the digital micro-architecture. The integrated verification environment allows re-use of the software tests for generated RTL code, which reduces the need for dedicated RTL test-benches by more than 80 percent. The HLS methodology has reduced the overall development effort for SeeCubic by more than 50 percent. The design is fully validated and demonstrable on an FPGA platform; and because Catapult HLS source is technology-independent, designers can easily port designs to various FPGA and ASIC technologies.
Stream TV's breakthrough Ultra-D technology is the only proprietary glasses-free 3D solution that delivers both a stunning visual display as well as content conversion from any 2D or 3D source.
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SOURCE Mentor, a Siemens business
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