Who:

MoSys (NASDAQ: MOSY), a leader in semiconductor solutions that enable fast, intelligent data access for network and communications systems, is exhibiting, supporting ecosystem partner demonstrations, and participating in the panel discussion, Will the Optical Backplane Ever Happen?, at DesignCon 2015. The company is also introducing its IC Spotlight™ Analyzer software toolkit developed for networking system designers to debug and perform on-chip analysis of high-speed serial I/O channels connected with Bandwidth Engine® serial memory and LineSpeed™ 100G data path devices, enabling rapid system bring up and evaluation.

 • MoSys Bandwidth Engine IC Eliminates Memory Bottlenecks with serial GigaChip® Interface.

o MoSys® Bandwidth Engine 2 – Burst (MSR620) device delivering over 140Gbps data throughput on only 8 SerDes transceivers connected to the Altera® Arria® 10 FPGA Evaluation board.

o Dual Bandwidth Engine devices providing double the memory capacity of 1152Mb on the Xilinx® Virtex®-7 FPGA and a robust 15.6G interface to Xilinx Kintex® UltraScale™ FPGA.

• MoSys LineSpeed PHY ICs Deliver Signal Integrity and Low Power for modules and Line Cards.

o LineSpeed 100G Low Power Retimer (MSH110) and 100G Gearbox (MSH310) performing full duplex 4x25G traffic over passive QSFP28 copper cable from multiple vendors enables 100G QSFP, CFP4 and CFP2 modules.

o A product technology demonstration will take place at FCI booth #817, featuring the extended reach ability of LineSpeed 100G PHYs by driving high-speed signal transmissions at 25/28G across an AirMAX VSe® connector and an FCI backplane using a LineSpeed 100G Multi-Mode Gearbox (MSH310).

• MoSys’ IC Spotlight Analyzer development environment will be demonstrated with Bandwidth Engine and LineSpeed products.

• MoSys will participate in the panel discussion, Will the Optical Backplane Ever Happen? John Monson , vp of marketing and sales for MoSys, will join panelists from Cisco , Intel , Google and Juniper Networks , to address the opportunities and challenges for optical backplanes as Moore's Law continues to drive for higher signaling rates.

What:

Taking place annually in Silicon Valley, DesignCon is the premier educational conference and technology exhibition for electronic design engineers in the high speed communications and semiconductor communities.

When:

DesignCon 2015 takes place January 27-30; Expo is January 28-29.

Where:

Santa Clara Convention Center