Synopsys DAC Events, Monday, June 2, 2014
WHAT: Samsung–ARM–Synopsys Breakfast
TOPIC: A Simple Formula for Success with Next-Generation Wearables to High-Performance SoCs
TIME: 7:15 a.m. to 8:45 a.m.
LOCATION: The Westin Hotel San Francisco Market Street, Metropolitan Ballroom I & II
For more information please visit:
http://www.synopsys.com/Community/Partners/samsung/Pages/dac-2014-samsung-breakfast.aspx
WHAT: IC Compiler Lunch Event
TOPIC: IC Compiler and IC Compiler II: Addressing Advanced Design Needs
TIME: 11:30 a.m. to 1:30 p.m.
LOCATION: The Westin Hotel San Francisco Market Street, Metropolitan Ballroom I
For more information please visit:
http://www.synopsys.com/Tools/Implementation/PhysicalImplementation/Pages/dac-2014-ic-compiler-lunch.aspx
WHAT: Circuit Simulation Luncheon Panel
TOPIC: Complex Mixed-Signal SoCs: How to Conquer the Next Verification Frontier
TIME: 11:30 a.m. to 1:30 p.m.
LOCATION: The Westin Hotel San Francisco Market Street, Metropolitan Ballroom III
For more information, please visit:
http://www.synopsys.com/Tools/Verification/AMSVerification/Pages/dac-2014-ams-verification-luncheon.aspx
WHAT: PrimeTime Special Interest Group (SIG) Dinner
TOPIC: Accelerating Timing Closure with Advanced Technologies
TIME: 6:00 p.m. to 9:00 p.m.
LOCATION: The Westin Hotel San Francisco Market Street, Metropolitan Ballroom I & II
For more information please visit:
https://www.synopsys.com/cgi-bin/ptsig14dc/reg1.cgi
Synopsys DAC Events, Tuesday, June 3, 2014
WHAT: GLOBALFOUNDRIES/Synopsys Breakfast
TOPIC: Building an Open Ecosystem to Fuel IoT and Mobile Growth
TIME: 7:15 a.m. to 8:45 a.m.
LOCATION: The Westin Hotel San Francisco Market Street, Metropolitan Ballroom I & II
For more information please visit:
http://www.synopsys.com/Community/Partners/GlobalFoundries/Pages/dac-2014-gf-breakfast.aspx
WHAT: Verification Luncheon
TOPIC: SoC Leaders Verify with Synopsys
TIME: 11:30 a.m. to 1:45 p.m.
LOCATION: The Westin Hotel San Francisco Market Street, Metropolitan Ballroom I & II
For more information please visit:
http://www.synopsys.com/Tools/Verification/Pages/dac2014-verification-luncheon-panel.aspx
WHAT: Custom Design Luncheon Panel
TOPIC:
Innovations in Custom Design
TIME: 11:30 a.m. to 1:30 p.m.
LOCATION: The Westin Hotel San Francisco Market Street, Metropolitan Ballroom III
For more information please visit:
http://www.synopsys.com/Tools/Implementation/CustomImplementation/Pages/dac-2014-custom-design-luncheon.aspx
Synopsys at DAC 2014
Visit Synopsys at Booth #1133 to learn more about the newest technologies available to help accelerate innovation in the electronic design industry. Synopsys will offer demonstrations of its custom implementation, Design Compiler® solution, PrimeTime® tool, static/formal verification, DesignWare® IP and the recently introduced IC Compiler II™ product, Verification Compiler™ platform and ZeBu® Server-3 emulator. Also find out more about how Synopsys' Coverity® software development and testing products are improving software quality as well asreducing the risk of security breaches and catastrophic failures that plague many of today's large software systems.
You can visit Synopsys in the ARM Connected Community Pavilion, booth #2001.
Synopsys will also be highlighted on the DAC floor at many of its other partners' booths.
Be sure to check out Synopsys' participation in the new DAC Automotive Village to learn about the newest advancements in automotive electronics design.
For more information on all of Synopsys' activities at DAC, visit: www.synopsys.com/DAC.
Media Registration Information
Seating is limited at Synopsys' special events at DAC. Registration is required. Members of the media interested in attending Synopsys' special events or requiring more information should email inquiries to Diane Hayward at Email Contact.
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) accelerates innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor IP, its software, IP and services help engineers address their design, verification, system and manufacturing challenges. Since 1986, engineers around the world have been using Synopsys technology to design and create billions of chips and systems. Learn more at http://www.synopsys.com.
Editorial Contacts:
Tess Cahayag
Synopsys, Inc.
650-584-5446
Email Contact
Diane Hayward
MCA, Inc.
650-968-8900 ext. 1157
Email Contact
SOURCE Synopsys, Inc.
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