SoC designers gain high performance and fast turnaround at low cost and reduced risk
ANDOVER, Mass. — (BUSINESS WIRE) — January 9, 2014 — Avery Design Systems and BaySand today announced a cooperative effort to deliver comprehensive IP solutions for BaySand’s breakthrough TeneX configurable System on Chip (SoC) solution based on innovative Metal Configurable Standard Cell (MCSC) technology. The cooperation that spans PCI Express, USB, DDR, and SATA, will allow SOC designers to benefit from a high-performance configurable platform, deploying robust verification models to achieve shorter time-to-market and lower cost.
“Avery is excited to team with BaySand to promote a comprehensive and cohesive design IP and core-to-chip-level verification solution to fully leverage the unparalleled value propositions in NRE and time to market (TTM) of Tenex”, said Chris Browy, vice president of sales and marketing for Avery Design Systems. “Initially Avery VIP will be used to internally validate BaySand’s IP portfolio using our robust models, protocol checking, and compliance testsuites. Tenex customers will benefit by using Avery VIP for their SoC verification based on shared goals and experience built up between Avery and BaySand.”
“As verification might account for significant amount of design development cost and time, BaySand partnered with Avery to enhance the TeneX solution and allow SoC and ASIC engineers to enjoy the advantages of low NRE and short time-to-market,” said Jonathan Park, Executive Vice President and CTO at BaySand. “Avery VIP product suite provides our customers with a robust verification solution that can help reduce design risk and further shorten turnaround time.”
About Avery VIP
Avery is an industry leading supplier of VIP for over 25 standards including high-speed IO, SSD/HDD, embedded storage, mobile, memory, and control bus. Our solutions provide a complete verification solution consisting of SystemVerilog UVM compliant models and environment, protocol checkers, directed and random compliance test suites, and reference verification frameworks. Additional advanced debug features include multi-level analyzer trackers to visualize data and control flow through the protocol stacks. Compliance verification services are also available.
About Avery Design Systems
Founded in 1999, Avery Design Systems, Inc. enables system and SOC design teams to achieve dramatic functional verification productivity improvements through the use of formal analysis applications for automatic property and coverage generation and RT-level and gate-level X verification; robust core-through-chip-level Verification IP for PCI Express, USB, AMBA, UFS, MIPI, DDR/LPDDR, NVM Express, SCSI Express, SATA Express, eMMC, and SD/SDIO standards. The company is a member of the Mentor Graphics Value Added Partnership (VAP) program and has established numerous Avery Design VIP partner program affiliations with leading IP suppliers. More information about the company may be found at www.avery-design.com.
About BaySand
BaySand is a privately held fabless semiconductor company developing metal-only configurable ASICs using its innovative and disruptive Metal Configurable Standard Cell (MCSC) technology. Its TeneX product family, based on BaySand’s MCSC Technology, offers not only compatible density, power and performance compared to standard-cell technology, but also provides unparalleled value propositions in NRE and time-to-market (TTM). Headquartered in Morgan Hill, California, BaySand provides ideal and complete custom silicon solutions for FPGAs, standard-cell ASICs and customizable ASSP platforms. Visit BaySand’s website at www.BaySand.com.
Contact:
Avery Design Systems
Chris Browy, 978-689-7286
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or
BaySand
Inc.
Tsipi Landen
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